56F8366 datasheet(125/182 Pages) FREESCALE

tên linh kiện	56F8366

Giải thích chi tiết về linh kiện	16-bit Digital Signal Controllers

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56F8366 Technical Data, Rev. 7

Freescale Semiconductor

125

Preliminary

Figure 6-10 Overall Control of GPIOC Pads Using SIM_GPS Control

Table 6-2 Control of GPIOC Pads Using SIM_GPS Control 1

1. This applies to the four pins that serve as Quad Decoder / Quad Timer / SPI / GPIOC functions. A separate set of control

bits is used for each pin.

Pin Function

Control Registers

Comments

GPIO Input

—

GPIO Output

—

Quad Timer Input /

Quad Decoder

Input 2

2. Reset configuration

—

See the “Switch Matrix for Inputs to the Timer”

table in the 56F8300 Peripheral User Manual

for the definition of timer inputs based on the

Quad Decoder mode configuration.

Quad Timer Output

/ Quad Decoder

Input 3

3. Quad Decoder pins are always inputs and function in conjunction with the Quad Timer pins.

1—

SPI input

—

See SPI controls for determining the direction

of each of the SPI pins.

SPI output

—

GPIOC_PER Register

GPIO Controlled

I/O Pad Control

SIM_ GPS Register

Quad Timer Controlled

SPI Controlled

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