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STM32W108CB bảng dữ liệu(PDF) 165 Page - STMicroelectronics |
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STM32W108CB bảng dữ liệu(HTML) 165 Page - STMicroelectronics |
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165 / 179 page ![]() STM32W108CB, STM32W108HB Electrical characteristics Doc ID 16252 Rev 2 165/179 Note: The signal-ended ADC measurements are limited in their range and only guaranteed for accuracy within the limits shown in this table. The ADC's internal design allows for measurements outside of this range (±200 mV) when the input buffer is disabled, but the accuracy of such measurements is not guaranteed. The maximum input voltage is of more interest to the differential sampling where a differential measurement might be small, but a common mode can push the actual input voltage on one of the signals towards the upper voltage limit. Maximum input voltage Input buffer disabled Input buffer enabled VREF VDD_PADS - 0.1 V Single-ended signal range Input buffer disabled Input buffer enabled 0 0.1 VREF VDD_PADS – 0.1 V Differential signal range Input buffer disabled Input buffer enabled -VREF -VDD_PADS + 0.1 +VREF +VDD_PADS - 0.1 V Common mode range Input buffer disabled Input buffer enabled 0 VDD_PADS/2 VREF V Input referred ADC offset -10 10 mV Input Impedance 1 MHz sample clock 6 MHz sample clock Not sampling 1 0.5 10 M Ω Table 39. ADC specifications (continued) Parameter Min. Typ. Max. Units |
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