PCI1221 datasheet(112/123 Pages) TI

112 / 123 page

112

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

recommended operating conditions (see Note 3)

OPERATION

MIN

NOM

MAX

UNIT

VCC

Core voltage

Commercial

3.3 V

3.3

3.6

VCCP

PCI I/O clamping voltage

Commercial

3.3 V

3.3

3.6

VCCP

PCI I/O clam ing voltage

Commercial

5 V

4.75

5.25

VCCA

PC Card I/O clamping voltage

Commercial

3.3 V

3.3

3.6

CCA

VCCB

PC Card I/O clam ing voltage

Commercial

5 V

4.75

5.25

VCCI

Miscellaneous I/O clamping voltage

Commercial

3.3 V

3.3

3.6

VCCI

Miscellaneous I/O clam ing voltage

Commercial

5 V

4.75

5.25

†

PCI

3.3 V

0.5 VCCP

VCCP

†

PCI

5 V

VCCP

VIH†

High-level input voltage

PC Card

3.3 V

0.475

VCCA/B

5 V

2.4

VCCA/B

MISC‡

VCCI

Fail safe§

VCC

†

PCI

3.3 V

0.3 VCCP

†

PCI

5 V

0.8

VIL†

Low-level input voltage

PC Card

3.3 V

0.325

VCCA/B

5 V

0.8

MISC‡

0.8

Fail safe§

0.8

PCI

VCCP

Input voltage

PC Card

VCCA/B

In ut voltage

MISC‡

VCCI

Fail safe§

VCC

PCI

VCC

VO¶

Output voltage

PC Card

VCC

VO¶

Out ut voltage

MISC‡

VCC

Fail safe§

VCC

PCI and PC Card

Input transition time (tr and tf)

Miscellaneous and fail

safe

Operating ambient temperature range

°C

TJ#

Virtual junction temperature

115

°C

NOTE 3: Unused pins (input or I/O) must be held high or low to prevent them from floating.

† Applies to external inputs and bidirectional buffers without hysteresis

‡ Miscellaneous pins are 149, 150, 151, 152, 154, 155, 156, 157, 158, 159, 161, 163 for the PDV packaged device and G15, F17, E19, F14, F15,

E17, D19, A16, A16, C15, C15, E14, B15 and C14 for the GHK packaged device (SUSPEND, SPKROUT, RI_OUT, multifunction terminals

(MFUNC0–6), and power switch control pins).

§ Fail-safe pins are 16, 56, 68, 74, 82, 122, 134, and 140 for the PDV packaged device and H3, P7, U8, R9, V11, M19, J18, and H17 for the GHK

packaged device (card detect and voltage sense pins).

¶ Applies to external output buffers

# These junction temperatures reflect simulation conditions. The customer is responsible for verifying junction temperature.

PCI1221 bảng dữ liệu(PDF) 112 Page - Texas Instruments

PCI1221 bảng dữ liệu(HTML) 112 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL