AX2000-1CS896 datasheet(223/226 Pages) ACTEL

223 / 226 page

Axcelerator Family FPGAs

v2.7

4 -3

Advanced v0.6

Timing characteristics for the "Routed Clocks" section were updated.

2-57

(continued)

Table 2-88 to Table 2-91 were updated.

2-75 to 2-78

Table 2-97 to Table 2-98were updated.

2-86 to 2-87

The "Low Power Mode" section was updated.

2-89

The "Interface" section was updated.

2-89

The "Data Registers (DRs)" section was updated.

2-90

The "Security" section was updated.

2-90

The "Silicon Explorer II Probe Interface" section was updated.

2-91

The "Programming" section was updated.

2-91

In the "208-Pin PQFP" (AX500) section, pins 2, 52, and 156 changed from VCCDA to VCCA.

For pins 170 and 171, the I/O names refer to pair 23 instead of 24.

3-78

The following changes were made in the "676-Pin FBGA"(AX500) section:

AE2, AE25

Change from NC to GND.

AF2, AF25

Changed from GND to NC

AB4, AF24, C1, C26 Changed from VCCDA to VCCA

AD15

Change from VCCDA to VCOMPLE

AD17

Changed from VCOMPLE to VCCDA

3-36

In the "896-Pin FBGA" (AX2000) section, the AK28 changed from VCCIB5 to VCCIB4.

3-49

The "352-Pin CQFP" section is new.

3-88

The "624-Pin CCGA" section is new.

3-102

Advanced v1.5

All I/O FIFO capability was removed.

n/a

Table 1-1 was updated.

Figure 1-9 and was updated.

1-7

Figure 2-5 was updated.

2-14

The "Using an I/O Register" section was updated.

2-14

The AX250 and AX1000 descriptions were added to the "484-Pin FBGA"section.

3-22

Advanced v1.4

Table 2-3 was updated.

2-2

Figure 2-1 was updated.

2-8

Figure 2-48 was updated.

2-63

Figure 2-52 was updated.

2-68

Advanced v1.3

In the "208-Pin PQFP" table, pin 196 was missing, but it has been added in this version with a

function of GND.

3-78

The following pins in the "484-Pin FBGA" table for AX500 were changed:

Pin G7 is GND/LP

Pins AB8, C10, C11, C14, AB16 are NC.

3-22

The "676-Pin FBGA" table was updated.

3-36

Previous Version

Changes in Current Version (v2.7)

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