ADE5166 datasheet(130/148 Pages) AD

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ADE5166/ADE5169

Rev. 0 | Page 130 of 148

For example, to get a baud rate of 9600 while operating at a core

clock frequency of 4.096 MHz, with the PLL CD bits equal to 0,

DIV2 + SBTH2 = log(4,096,000/(16 × 9600))/log2 =

4.74 = 4

Note that the DIV result is rounded down.

SBAUDF2 = 64 × (4,096,000/(16 × 23 × 9600) − 1) =

42.67 = 0x2B

Therefore, the actual baud rate is 9570 bps, which gives an error

of 0.31%.

UART

2 ADDITIONAL FEATURES

Enhanced Error Checking

The extended UART2 provides frame error, break error, and

overwrite error detection. Framing errors occur when a stop bit

is not present at the end of the frame. A missing stop bit implies

that the data in the frame may not have been received properly.

Break error detection indicates whether the RxD2 line is low for

longer than a 9-bit frame. It indicates that the data just received,

a 0 or NULL character, is not valid because the master has discon-

nected. Overwrite error detection indicates whether the received

data isn’t read fast enough and, as result, a byte of data is lost.

UART2 TxD2

Signal Modulation

There is an internal 38 kHz signal that can be read with the

UART2 transmit signal for use in remote control applications.

One of the events that can wake the MCU from sleep mode is

activity on the RxD2 (P0.7/SS/T1/RxD2) pin. See the

section for more information.

3.3 V

Peripherals and Wake-Up Events

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