H8SXSLASH1663R datasheet(1050/1504 Pages) RENESAS

tên linh kiện	H8SX/1663R

Giải thích chi tiết về linh kiện	Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series

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Section 20 USB Function Module (USB)

Rev. 2.00 Sep. 24, 2008 Page 1018 of 1468

REJ09B0412-0200

20.5.5

EP1 Bulk-Out Transfer (Dual FIFOs)

USB function

Application

OUT token reception

Data reception from host

Set EP1 FIFO full status

(IFR0.EP1 FULL = 1)

Clear EP1 FIFO full status

(IFR0.EP1 FULL = 0)

Read EP1 receive data

size register (EPSZ1)

Read data from EP1

data register (EPDR1)

Write 1 to EP1 read

complete bit

(TRG.EP1 RDFN = 1)

Space

in EP1 FIFO?

Yes

Both

EP1 FIFOs empty?

Yes

NACK

ACK

Interrupt

request

Interrupt request

Figure 20.17 EP1 Bulk-Out Transfer Operation

EP1 has two 64-byte FIFOs, but the user can receive data and read receive data without being

aware of this dual-FIFO configuration.

When one FIFO is full after reception is completed, the EP1FULL bit in IFR0 is set. After the first

receive operation into one of the FIFOs when both FIFOs are empty, the other FIFO is empty, and

so the next packet can be received immediately. When both FIFOs are full, NACK is returned to

the host automatically. When reading of the receive data is completed following data reception, 1

is written to the EP1RDFN bit in TRG. This operation empties the FIFO that has just been read,

and makes it ready to receive the next packet.

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