H8SXSLASH1663R datasheet(855/1504 Pages) RENESAS

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Section 16 8-Bit Timers (TMR)

Rev. 2.00 Sep. 24, 2008 Page 823 of 1468

REJ09B0412-0200

Table 16.2

Clock Input to TCNT and Count Condition (Unit 0)

TCR

TCCR

Channel

Bit 2

CKS2

Bit 1

CKS1

Bit 0

CKS0

Bit 1

ICKS1

Bit 0

ICKS0 Description



Clock input prohibited

Uses internal clock. Counts at rising edge of P

φ/8.

Uses internal clock. Counts at rising edge of P

φ/2.

Uses internal clock. Counts at falling edge of P

φ/8.

Uses internal clock. Counts at falling edge of P

φ/2.

Uses internal clock. Counts at rising edge of P

φ/64.

Uses internal clock. Counts at rising edge of P

φ/32.

Uses internal clock. Counts at falling edge of P

φ/64.

Uses internal clock. Counts at falling edge of P

φ/32.

Uses internal clock. Counts at rising edge of P

φ/8192.

Uses internal clock. Counts at rising edge of P

φ/1024.

Uses internal clock. Counts at falling edge of P

φ/8192.

Uses internal clock. Counts at falling edge of P

φ/1024.

TMR_0



Counts at TCNT_1 overflow signal*



Clock input prohibited

Uses internal clock. Counts at rising edge of P

φ/8.

Uses internal clock. Counts at rising edge of P

φ/2.

Uses internal clock. Counts at falling edge of P

φ/8.

Uses internal clock. Counts at falling edge of P

φ/2.

Uses internal clock. Counts at rising edge of P

φ/64.

Uses internal clock. Counts at rising edge of P

φ/32.

Uses internal clock. Counts at falling edge of P

φ/64.

Uses internal clock. Counts at falling edge of P

φ/32.

Uses internal clock. Counts at rising edge of P

φ/8192.

Uses internal clock. Counts at rising edge of P

φ/1024.

Uses internal clock. Counts at falling edge of P

φ/8192.

Uses internal clock. Counts at falling edge of P

φ/1024.

TMR_1



Counts at TCNT_0 compare match A*



Uses external clock. Counts at rising edge*



Uses external clock. Counts at falling edge*

All



Uses external clock. Counts at both rising and falling

edges*

Notes: 1. If the clock input of channel 0 is the TCNT_1 overflow signal and that of channel 1 is the

TCNT_0 compare match signal, no incrementing clock is generated. Do not use this

setting.

2. To use the external clock, the DDR and ICR bits in the corresponding pin should be set

to 0 and 1, respectively. For details, see section 13, I/O Ports.

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