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M32C/8A bảng dữ liệu(PDF) 136 Page - Renesas Technology Corp |
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M32C/8A bảng dữ liệu(HTML) 136 Page - Renesas Technology Corp |
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136 / 372 page ![]() M32C/8A Group 12. Watchdog Timer Rev.1.00 Jul 15, 2007 Page 119 of 352 REJ09B0385-0100 Figure 12.3 WDC Register, WDTS Register b7 0 b6 b5 b4 b1 b2 b3 Watchdog Timer Control Register Symbol WDC Address 000Fh Bit Symbol Bit Name RW − (b4-b0) After Reset 00XX XXXXb b0 Function WDC5 − (b6) Cold start/warm start determine flag(1) High-order bits of watchdog timer WDC7 RW Reserved bit Prescaler select bit RW RW RO 0: Cold start 1: Warm start Set to 0 0: Divide-by-16 1: Divide-by-128 NOTES: 1. The WDC5 bit is 0 after power-on. It can be set to 1 only by program. The bit becomes 1 by writing either a 0 or 1. The bit maintains a value set before reset, even after reset has been performed. b7 Watchdog Timer Start Register Symbol WDTS Address 000Eh RW Address Undefined b0 Function The counter is initialized and starts decrementing by a write instruction to the WDTS register. 7FFFh is the default value after initialization no matter what value is written. WO |
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