M32CSLASH8A datasheet(110/372 Pages) RENESAS

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M32C/8A Group

9. Clock Generation Circuits

Rev.1.00

Jul 15, 2007

Page 93 of 352

REJ09B0385-0100

9.6

System Clock Protect Function

The system clock protect function prohibits changing the CPU clock source when the main clock is selected as the

CPU clock source. With this function, the CPU clock can continue running even if the program runs out of control.

When the PM21 bit in the PM2 register is set to 1 (disables a clock change), the following bits cannot be written:

• Bits CM02, CM05, and CM07 in the CM0 register

• Bits CM10 and CM17 in the CM1 register

• The CM20 bit in the CM2 register

• All bits in registers PLC0 and PLC1

The CPU clock continues running when the WAIT instruction is executed.

Figure 9.16 shows a procedure to use the system clock protect function. Follow the procedure while the CM05 bit

in the CM0 register is set to 0 (main clock oscillates) and the CM07 bit to 0 (main clock as CPU clock source).

Figure 9.16

Procedure to Use System Clock Protect Function

Start

PM2 register: PM21 bit = 1(1)

PRCR register: PRC1 bit = 0

End

PRCR register: PRC1 bit = 1

Enable writing to registers associated with clocks

NOTE:

1. Execute the WAIT instruction when the PM21 bit in the PM2 register is set to 0.

Disable a clock change

Disable writing to registers associated with clocks

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