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M306V2EEFS bảng dữ liệu(PDF) 123 Page - Renesas Technology Corp

tên linh kiện M306V2EEFS
Giải thích chi tiết về linh kiện  SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER
PDF  271 Pages
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nhà sản xuất  RENESAS [Renesas Technology Corp]
Trang chủ  http://www.renesas.com
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M306V2EEFS bảng dữ liệu(HTML) 123 Page - Renesas Technology Corp

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Rev.1.40
Oct 06, 2004 page 123 of 269
M306V2ME-XXXFP, M306V2EEFP
(4) Bus collision detection function and other functions (UART2)
This function is to sample the output level of the TxD pin and the input level of the RxD pin at the rising
edge of the transfer clock; if their values are different, then an interrupt request occurs. Figure 2.11.26
shows the example of detection timing of a buss collision (in UART mode).
And also, bit 5 of the special UART2 mode register is used as the selection bit for auto clear function
select bit of enable bit. Setting this bit to “1” automatically resets the transmit enable bit to “0” when “1”
is set in the bus collision detection interrupt request bit (nonconformity) (refer to Figure 2.11.25).
Bit 6 of the special UART2 mode register is used as the transmit start condition select bit. Setting this
bit to “1” starts the TxD transmission in synchronization with the falling edge of the RxD terminal (refer
to Figure 2.11.26).
Figure 2.11.25 Detection timing of a bus collision (in UART mode)
Figure 2.11.26 Some other functions
Transmit start condition select bit (Bit 6 of the UART2 special mode register)
CLK
TxD
Enabling transmission
CLK
TxD
RxD
With "1: falling edge of RxD2" selected
0: In normal state
ST : Start bit
SP : Stop bit
ST
ST
SP
SP
Transfer clock
TxD2
RxD2
Bus collision detection
interrupt request signal
“H”
“L”
“H”
“L”
“H”
“L”
“1”
“0”
Bus collision detection
interrupt request bit
“1”
“0”



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