STV2310 datasheet(109/112 Pages) STMICROELECTRONICS

109 / 112 page

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STV2310

Revision History

The following table summarizes the modifications applied to this document.

Revision

Description

Date

1.0

First Issue

N/A

1.1

Addition of

Section 5.3: VBI Control Register Descriptions on page 86.

March 2001

1.2

Addition of

Chapter 7: Package Mechanical Data on page 107.

March 2001

1.3

Addition of

Section 4.5: Standard Research Sequence Programming on

page 21, Section 4.9: Output Scaler and Format Converter on page 24,

Section 4.3: Input Sample Rate Conversion on page 18 and Section

6: Electrical Characteristics on page 100

9 May 2001

1.4

Update of all register descriptions, general descriptions and programming information. Pin

description section reformatted. Addition of Anti-Aliasing Filter Diagrams.

June 2001

1.5

Update of all register descriptions, general descriptions and programming information.

July 2001

1.6

Update of

Figure 9 and Analog Input Stage programming data.

July 2001

1.7

Reset values corrected in Register Descriptions and register

DDECCONT35 updated

with Cut 2 information.

Section 6: Electrical Characteristics on page 100 updated.

Figure 35 and Figure 35 updated. Moved to Datasheet template 2.1 and converted from

single file to book format.

November 2001

1.8

Updated

Figure 18 on page 30 and Figure 3 on page 8, Zoom in/out function

characteristics clarified. Addition of ESD PERFORMANCES on page 80.

1.9

SECAM filter is removed. Registers

DDECCONT2A, DDECCONT17 and

DDECCONTE modified.

12 February 2002

2.0

Update of

Section 6: Electrical Characteristics on page 100.

25 March 2002

2.1

ESD Section removed.

10 July 2002

2.2

Pin NRESET changed to NRESET. Updated register information for cut 3.0.

21 Nov 2002

2.3

Updated

Figure 3 on page 8 and Figure 6 on page 15.

2.4

Updated

Figure 3 on page 8 and Figure 4 on page 9. Update to VCC33OUT in

Section 2.2: Pin Descriptions. Update of Figure 6 on page 15. Ouput Sync Pulse

information added to

Section 4.2: Synchronization and Monitoring Unit on

page 16. Update of Section 4.4: Luminance and Chrominance Separation on

page 19. Update of Table 8: Confirmation Codes on page 22. New section added:

Section 4.6: Standard Identification on page 22. Update of Section

4.7: Chroma Demodulation on page 22. Update of Section 4.8: Soft Mixer on

page 23.Update of Section 4.12: Output FIFO and Line-locked Ouput Pixel

Clock Generator on page 29. GDIFF added to Section 6.7: Analog-to-Digital

Converter (ADC) on page 102. Updated Figure 35: Notch Filter - Narrow Group

on page 135 and Figure 36: Notch Filter - Wide Group on page 136.

20 January 2003

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