ADE3800_05 datasheet(113/138 Pages) STMICROELECTRONICS

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ADE3800

TCON Example

The following is an example of a basic TCON script:

WriteByte (TCON_CTRL_EN, 0x01);// enable TCON output

// vsync start at vcount = 0, end at vcount = 1

WriteWord (TCON_PULSE_0_SET, 0x0000);// pulse 0 set = 0 (12 bit value)

WriteWord (TCON_PULSE_0_RST, 0x1001);// pulse 0 reset = 0x001 (12 bit),

// vertical pulse, comparator 0

// HSync start at hcount = 4, end at hcount = 6

WriteWord (TCON_PULSE_1_SET, 0x0004);// pulse 1 set = 0x004 (12 bit value)

WriteWord (TCON_PULSE_1_RST, 0x0006);// pulse 1 reset = 0x006, horiz pulse

// data enable start at upper left (31H,1V), ending at lower right (1311H, 1025V)

// for a 1280 x 1024 output enable

WriteWord (TCON_WINDOW_0_LEFT, 0x001F);// window 0 left edge comparison

// count = 0x01F (12 bit value)

WriteWord (TCON_WINDOW_0_RIGHT, 0x051F);// right edge count = 0x51F

WriteWord (TCON_WINDOW_0_TOP, 0x0001);// top edge count = 1

WriteWord (TCON_WINDOW_0_BOTTOM, 0x0400);// bottom edge = 0x400, window type

// select pulses and window for oHSync, ovsync, oenab

WriteByte (TCON_X_OHSYNC, 0x03);// HSync on TCON pin 0 is pulse 1

WriteByte (TCON_X_OVSYNC, 0x02);// vsync on TCON pin 0 is pulse 0

WriteByte (TCON_X_OENAB, 0x08);// out enable on pin 0 is window 0

4.19 LVDS/RSDS Features

The LVDS/RSDS block supports the following modes:

● LVDS 1 ppc

— 4 data channels + 1 clock channel – 40MHz - 85MHz

● LVDS 2 ppc

— 8 data channels + 2 clock channels – 40MHz - 70MHz

● RSDS 1 ppc

— 12 data channels + 1 clock channel – 13.5MHz - 85MHz

● RSDS 2 ppc (128 pin package only)

— 24 data channels + 2 clock channels – 13.5MHz - 70MHz

Its features are as follows:

● Power down modes

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