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AT80SND1C-ROTIL bảng dữ liệu(PDF) 197 Page - ATMEL Corporation |
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AT80SND1C-ROTIL bảng dữ liệu(HTML) 197 Page - ATMEL Corporation |
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197 / 210 page ![]() 197 AT8xC51SND1C 4109E–8051–06/03 Analog to Digital Converter Definition of symbols Table 172. Analog to Digital Converter Timing Symbol Definitions Characteristics Table 173. Analog to Digital Converter AC Characteristics V DD = 2.7 to 3.3 V, TA = -40 to +85°C Notes: 1. AV DD= AVREFP= 3.0 V, AVSS= AVREFN= 0 V. ADC is monotonic with no missing code. 2. The differential non-linearity is the difference between the actual step width and the ideal step width (see Figure 154). 3. The integral non-linearity is the peak difference between the center of the actual step and the ideal transfer curve after appropriate adjustment of gain and offset errors (see Figure 154). 4. The offset error is the absolute difference between the straight line which fits the actual transfer curve (after removing of gain error), and the straight line which fits the ideal transfer curve (see Figure 154). 5. The gain error is the relative difference in percent between the straight line which fits the actual transfer curve (after removing of offset error), and the straight line which fits the ideal transfer curve (see Figure 154). Waveforms Figure 153. Analog to Digital Converter Internal Waveforms Signals Conditions C Clock H High E Enable (ADEN bit) L Low S Start Conversion (ADSST bit) Symbol Parameter Min Max Unit T CLCL Clock Period 4 µs T EHSH Start-up Time 4 µs T SHSL Conversion Time 11·T CLCL µs DLe Differential non- linearity error(1)(2) 1LSB ILe Integral non- linearity errorss (1)(3) 2LSB OSe Offset error (1)(4) 4LSB Ge Gain error (1)(5) 4LSB ADEN Bit ADSST Bit TEHSH T SHSL CLK TCLCL |
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