AT80SND1C-ROTIL datasheet(116/210 Pages) ATMEL

116 / 210 page

116

AT8xC51SND1C

4109E–8051–06/03

Command Line

Controller

As shown in Figure 81, the command line controller is divided in 2 channels: the com-

mand transmitter channel that handles the command transmission to the card through

the MCMD line and the command receiver channel that handles the response reception

from the card through the MCMD line. These channels are detailed in the following

sections.

Figure 81. Command Line Controller Block Diagram

Command Transmitter

For sending a command to the card, user must load the command index (1 Byte) and

argument (4 Bytes) in the command transmit FIFO using the MMCMD register. Before

starting transmission by setting and clearing the CMDEN bit in MMCON1 register, user

must first configure:

•

RESPEN bit in MMCON1 register to indicate whether a response is expected or not.

•

RFMT bit in MMCON0 register to indicate the response size expected.

•

CRCDIS bit in MMCON0 register to indicate whether the CRC7 included in the

response will be computed or not. In order to avoid CRC error, CRCDIS may be set

for response that do not include CRC7.

Figure 82 summarizes the command transmission flow.

As soon as command transmission is enabled, the CFLCK flag in MMSTA is set indicat-

ing that write to the FIFO is locked. This mechanism is implemented to avoid command

overrun.

The end of the command transmission is signalled to you by the EOCI flag in MMINT

Section "Interrupt", page 124. The end of the command transmission also resets the

CFLCK flag.

CTPTR

MMCON0.4

CRPTR

MMCON0.5

MCMD

CMDEN

MMCON1.0

TX COMMAND Line

Finished State Machine

Data Converter

// -> Serial

5-Byte FIFO

MMCMD

TX Pointer

RFMT

MMCON0.1

CRCDIS

MMCON0.0

RESPEN

MMCON1.1

Data Converter

Serial -> //

RX Pointer

17 - Byte FIFO

MMCMD

CFLCK

MMSTA.0

CRC7

Generator

RX COMMAND Line

Finished State Machine

CRC7 and Format

Checker

CRC7S

MMSTA.2

RESPFS

MMSTA.1

EOCI

MMINT.5

EORI

MMINT.6

Command Transmitter

Command Receiver

Write

Read

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