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ST7265X bảng dữ liệu(PDF) 152 Page - STMicroelectronics

tên linh kiện ST7265X
Giải thích chi tiết về linh kiện  LOW-POWER, FULL-SPEED USB 8-BIT MCU WITH 32K FLASH, 5K RAM, FLASH CARD I/F, TIMER, PWM, ADC, I2C, SPI
PDF  166 Pages
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nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
Trang chủ  http://www.st.com
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ST7265X bảng dữ liệu(HTML) 152 Page - STMicroelectronics

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COMMUNICATION INTERFACE CHARACTERISTICS (Cont’d)
13.11.3 I2C - Inter IC Control Interface
1) The device must internally provide a hold time of at least 300 ns for the SDA signal in order to bridge
the undefined region of the falling edge of SCL
2) The maximum hold time of the START condition has only to be met if the interface does not stretch the
low period of SCL signal
Cb = total capacitance of one bus line in pF
I
2C-Bus Timings
Parameter
Standard I
2C
Fast I
2C
Symbol
Unit
Min
Max
Min
Max
Bus free time between a STOP and START con-
dition
4.7
1.3
TBUF
ms
Hold time START condition. After this period,
the first clock pulse is generated
4.0
0.6
THD:STA
µs
LOW period of the SCL clock
4.7
1.3
TLOW
µs
HIGH period of the SCL clock
4.0
0.6
THIGH
µs
Set-up time for a repeated START condition
4.7
0.6
TSU:STA
µs
Data hold time
0 (1)
0 (1)
0.9(2)
THD:DAT
ns
Data set-up time
250
100
TSU:DAT
ns
Rise time of both SDA and SCL signals
1000
20+0.1Cb
300
TR
ns
Fall time of both SDA and SCL signals
300
20+0.1Cb
300
TF
ns
Set-up time for STOP condition
4.0
0.6
TSU:STO
ns
Capacitive load for each bus line
400
400
Cb
pF



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