AS3715 datasheet(125/159 Pages) AMSOSRAM

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[v1-03] 2015-Aug-10

AS3715 − Register Description

Figure 147:

ADC_MSB_result

Figure 148:

ADC_LSB_result

Figure 149:

RegStatus

Addr:71h

ADC_MSB_result

Bit

Bit Name

Default

Access

Bit Description

result_not_ready

Indicates end of conversion

0 : Result is ready

1 : Conversion is running

6:0

D9_3

b0000000

RW_SM

ADC result register Bit9..Bit3

Addr:72h

ADC_LSB_result

Bit

Bit Name

Default

Access

Bit Description

2:0

D2_0

b000

RW_SM

ADC result register Bit2..Bit0

Addr:73h

RegStatus

Bit

Bit Name

Default

Access

Bit Description

7curr3_lv

Bit is set when voltage of current sink CURR3 drops below low

voltage threshold (1ms debounce time default)

6curr2_lv

Bit is set when voltage of current sink CURR2 drops below low

voltage threshold (1ms debounce time default)

5curr1_lv

Bit is set when voltage of current sink CURR1 drops below low

voltage threshold (1ms debounce time default)

3sd4_lv

Bit is set when voltage of step down4 drops below low

voltage threshold (-5%) (1ms debounce time default)

2sd3_lv

Bit is set when voltage of step down3 drops below low

voltage threshold (-5%) (1ms debounce time default)

1sd2_lv

Bit is set when voltage of step down2 drops below low

voltage threshold (-5%) (1ms debounce time default)

0sd1_lv

Bit is set when voltage of step down1 drops below low

voltage threshold (-5%) (1ms debounce time default)

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