TMS320DM647_0804 datasheet(111/182 Pages) TI

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AECLKOUT

ACEx

ABE[1:0]

AEA[23:0]/

ABA[1:0]

AED[15:0]

AAOEASOE

AR/W

AAWEASWE

AARDY

ByteEnables

Address

ReadData

Hold=1

Strobe=4

Setup=1

DEASSERTED

AECLKOUT

ACEx

ABE[1:0]

AEA[23:0]/

ABA[1:0]

AED[15:0]

AAOEASOE

(A)

AR/W

AAWEASWE

(A)

AARDY (B)

ByteEnables

Address

WriteData

Hold=1

Strobe=4

Setup=1

DEASSERTED

TMS320DM647/TMS320DM648

Digital Media Processor

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SPRS372B – MAY 2007 – REVISED APRIL 2008

AAOE/ASOE and AAWE/ASWE operate as AAOE/ASOE (identified under select signals) and AAWE/ASWE,

respectively, during asynchronous memory accesses.

Polarity of the AARDY signal is programmable through the AP field of the EMIFA Async Wait Cycle Configuration

Figure 6-22. Asynchronous Memory Read Timing for EMIFA

AAOE/ASOE and AAWE/ASWE operate as AAOE/ASOE and AAWE/ASWE (identified under select signals) during

asynchronous memory accesses.

Polarity of the AARDY signal is programmable through the AP field of the EMIFA Async Wait Cycle Configuration

Figure 6-23. Asynchronous Memory Write Timing for EMIFA

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Peripheral Information and Electrical Specifications

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