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M58PR512LE bảng dữ liệu(PDF) 103 Page - Numonyx B.V

tên linh kiện M58PR512LE
Giải thích chi tiết về linh kiện  512-Mbit or 1-Gbit (횞 16, multiple bank, multilevel, burst) 1.8 V supply Flash memories
PDF  123 Pages
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nhà sản xuất  NUMONYX [Numonyx B.V]
Trang chủ  http://www.numonyx.com
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M58PR512LE bảng dữ liệu(HTML) 103 Page - Numonyx B.V

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M58PR512LE, M58PR001LE
Common flash interface
103/123
(P+32)h = 13Ch
03h
Bank region 1 (Erase block type 1): Page mode and Synchronous mode
capabilities
Bit 0: page-mode reads permitted
Bit 1: synchronous reads permitted
Bit 2: synchronous writes permitted
Bits 3-7: reserved
(P+33)h = 13Dh
0Ah
Bank region 1 (Erase block type 1) programming region information
Bit 0-7: aligned size of programming region in bytes
Bit 8-14: reserved
Bit 15: Legacy flash operation (ignore bit 0-7)
Bit 16-23: Control mode valid size in bytes
Bit 24-31: reserved
Bit 32-39: Control mode invalid size in bytes
Bit 40-46: reserved
Bit 47: Legacy flash operation (ignore bit 16-23 and 32-39)
(P+34)h = 13Eh
00h
(P+35)h = 13Fh
10h
(P+36)h = 140h
00h
(P+37)h = 141h
10h
(P+38)h = 142h
00h
1.
The variable P is a pointer which is defined at CFI offset 015h.
2.
Bank regions. There is one bank region, see tables 37, 38, 39 and 40 in Appendix A.
3.
Applies to M58PR512LE.
4.
Applies to M58PR001LE.
Table 50.
Extended flash array bank and erase block region information
Offset (1)
1.
The variable P is a pointer which is defined at CFI offset 015h.
Data
Description
(P+39)h = 143h
01h
Number of bank regions within the device(2)
2.
Bank regions. There is one EFA bank region.
Table 49.
Bank and erase block region 1 information(1) (continued)
Offset
Data
Description



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