STM32L4P5CEU6TR datasheet(114/311 Pages) STMICROELECTRONICS

tên linh kiện	STM32L4P5CEU6TR

Giải thích chi tiết về linh kiện	Ultra-low-power Arm® Cortex®-M4 32-bit MCUFPU, 150 DMIPS, up to 1-MB Flash memory, 320-KB SRAM, LCD-TFT, ext. SMPS

PDF	311 Pages

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nhà sản xuất	STMICROELECTRONICS [STMicroelectronics]

Trang chủ	http://www.st.com

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PI9

I/O FT

OCTOSPIM_P2_IO2,

CAN1_RX,

EVENTOUT

---

PI10

I/O FT

OCTOSPIM_P2_IO1,

PSSI_D14,

EVENTOUT

1. PC13, PC14 and PC15 are supplied through the power switch. Since the switch only sinks a limited amount of current (3 mA), the use of GPIOs PC13 to PC15 in output

mode is limited:

- The speed should not exceed 2 MHz with a maximum load of 30 pF

- These GPIOs must not be used as current sources (for example to drive a LED).

2. After a Backup domain power-up, PC13, PC14 and PC15 operate as GPIOs. Their function then depends on the content of the RTC registers which are not reset by the

system reset. For details on how to manage these GPIOs, refer to the Backup domain and RTC register descriptions in the RM0432 reference manual.

3. NC (not-connected) balls must be left unconnected. However, PF8 and PF9 NC' IOs are not bonded. They must be configured by software to output push-pull and forced to

0 in the output data register to avoid extra current consumption in low-power modes.

4. After reset, these pins are configured as JTAG/SW debug alternate functions, and the internal pull-up on PA15, PA13, PB4 pins and the internal pull-down on PA14 pin are

activated.

Table 15. STM32L4P5xx pin definitions (continued)

Pin Number

Pin name

(function

after

reset)

Alternate functions

Additional

functions

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