MPF0900AMBA2ES datasheet(180/205 Pages) NXP

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NXP Semiconductors

PF09

Nine-channel power management IC with advanced system safety monitoring

15.2 Functional register reset conditions

aaa-056088

TURNOFF

Power-down

sequence

Turn-off event

Soft reset

RUN

SYSTEM ON

FAULT

Fault shutdown

RESET

Power-up

sequence

Reset event

STANDBY

RSTB = HIGH

Off states

BIST

DBGOFF

OTP and

trim load

NO POWER

VIN > UVDET

V1P5D_POR

V1P5A_POR

ULPOFF

VDIG_POR

BIST

Self test

2 ms delay

LPOFF

LBIST

Fail-safe

transition

PWRUP_SEQ

SOFT_RST

OFF_OTP

SOFT_OTP_RST

PWRUP_SEQ

SOFT_RST

OFF_OTP

SOFT_OTP_RST

SOFT_RST

OFF_OTP

SOFT_OTP_RST

Figure 47. Functional bits reset diagram

All functional registers following either the power up or the soft reset will load the default value from OTP or

fixed value when the PF09 is starting a full Power-up sequence, that includes:

1. Transition from the DBGOFF into the Power-up sequence

2. Device performs a hard reset

Only functional registers following the soft reset will be able to reload the default value when a soft reset occurs.

provides a list of register characteristics following a soft reset.:

Bit Name

Description

Reset Value

Condition

FCCU1_RESET

Reset on FCCU1

0x00

No reset (only FS0B) Cleared on Soft-Reset, MCU must re-

configure the safety reaction.

Table 230. Bits reset during soft reset.

PF09

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 1.3 — 16 December 2025

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