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STM32F412RGT6 bảng dữ liệu(PDF) 127 Page - STMicroelectronics |
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STM32F412RGT6 bảng dữ liệu(HTML) 127 Page - STMicroelectronics |
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127 / 201 page ![]() DocID028087 Rev 7 127/201 STM32F412xE/G Electrical characteristics 166 Figure 36. I/O AC characteristics definition 6.3.17 NRST pin characteristics The NRST pin input driver uses CMOS technology. It is connected to a permanent pull-up resistor, RPU (see Table 57). Unless otherwise specified, the parameters given in Table 60 are derived from tests performed under the ambient temperature and VDD supply voltage conditions summarized in Table 16. Refer to Table 57: I/O static characteristics for the values of VIH and VIL for NRST pin. 1. Guaranteed by characterization, not tested in production. 2. The I/O speed is configured using the OSPEEDRy[1:0] bits. Refer to the STM32F4xx reference manual for a description of the GPIOx_SPEEDR GPIO port output speed register. 3. The maximum frequency is defined in Figure 36. 4. For maximum frequencies above 50 MHz and VDD > 2.4 V, the compensation cell should be used. Table 60. NRST pin characteristics Symbol Parameter Conditions Min Typ Max Unit RPU Weak pull-up equivalent resistor(1) VIN = VSS 30 40 50 k Ω VF(NRST)(2) NRST Input filtered pulse - - - 100 ns VNF(NRST)(2) NRST Input not filtered pulse VDD > 2.7 V 300 - - ns TNRST_OUT Generated reset pulse duration Internal Reset source 20 - - µs 1. The pull-up is designed with a true resistance in series with a switchable PMOS. This PMOS contribution to the series resistance must be minimum (~10% order) . 2. Guaranteed by design, not tested in production. |
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