TMP86FS28FG datasheet(102/272 Pages) TOSHIBA

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Page 90

8. 16-Bit TimerCounter (TC10,TC11)

8.1 16-Bit TimerCounter 10

TMP86FS28FG

8.1.3.4 Window Mode

In the window mode, the up-counter counts up at the rising edge of the pulse that is logical ANDed

product of the input pulse to the TC10 pin (window pulse) and the internal source clock. Either the posi-

tive logic (count up during high-going pulse) or negative logic (count up during low-going pulse) can be

selected.

When a match between the up-counter and the TC10DRA value is detected, an INTTC10 interrupt is

generated and the up-counter is cleared.

Define the window pulse to the frequency which is sufficiently lower than the internal source clock pro-

grammed with TC10CR<TC10CK>.

Figure 8-5 Window Mode Timing Chart

Match detect

TC10DRA

INTTC10

interrput request

Internal clock

Counter

TC10DRA

TC10 pin input

Internal clock

Counter

TC10 pin input

INTTC10

(a) Positive logic (TC10S = 10)

(b) Negative logic (TC10S = 11)

Match detect

Counter clear

Timer start

Counter

clear

Count start

Count stop

Count start

Count stop

Count start

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