TMP86FS49AFG datasheet(278/294 Pages) TOSHIBA

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Page 262

20. Serial PROM Mode

20.15 UART Timing

TMP86FS49AFG

20.15UART Timing

Table 20-19 UART Timing-1 (VDD = 4.5 to 5.5 V, fc = 2 to 16 MHz, Topr = -10 to 40°C)

Parameter

Symbol

Clock Frequency (fc)

Minimum Required Time

At fc = 2 MHz

At fc = 16 MHz

Time from matching data reception to the echo back

CMeb1

Approx. 930

465

µs58.1 µs

Time from baud rate modification data reception to the echo back

CMeb2

Approx. 980

490

µs61.3 µs

Time from operation command reception to the echo back

CMeb3

Approx. 800

400

µs

Checksum calculation time

CKsm

Approx. 7864500

3.93 s

491.5

µs

Erasure time of an entire flash memory

CEall

30 ms

Erasure time for a sector of a flash memory (in 4-kbyte units)

CEsec

15 ms

Table 20-20 UART Timing-2 (VDD = 4.5 to 5.5 V, fc = 2 to 16 MHz, Topr = -10 to 40°C)

Parameter

Symbol

Clock Frequency (fc)

Minimum Required Time

At fc = 2 MHz

At fc = 16 MHz

Time from the reset release to the acceptance of start bit of RXD pin

RXsup

2100

1.05 ms

131.3 ms

Matching data transmission interval

CMtr1

28500

14.2 ms

1.78 ms

Time from the echo back of matching data to the acceptance of baud rate

modification data

CMtr2

380

190

µs

23.8

µs

Time from the echo back of baud rate modification data to the acceptance

of an operation command

CMtr3

650

325

µs

40.6

µs

Time from the echo back of operation command to the acceptance of

password count storage addresses (Upper byte)

CMtr4

800

400

µs50 µs

RESET pin

RXD pin

RXsup

(5AH)

CMeb1

(5AH)

CMtr2

(28H)

CMeb2

CMtr3

(30H)

CMeb3

CMtr4

TXD pin

RXD pin

TXD pin

(5AH)

CMtr1

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