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STM32H563IIK6 bảng dữ liệu(PDF) 176 Page - STMicroelectronics |
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STM32H563IIK6 bảng dữ liệu(HTML) 176 Page - STMicroelectronics |
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176 / 270 page ![]() Electrical characteristics STM32H562xx and STM32H563xx 176/270 DS14258 Rev 5 Refer to Section 5.3.15 for more details on the input/output alternate function characteristics. Asynchronous waveforms and timings Figures 33 through 35 represent asynchronous waveforms, tables 70 through 77 provide the corresponding timings. The results shown in these tables are obtained with the following FMC configuration: • AddressSetupTime = 0x1 • AddressHoldTime = 0x1 • DataSetupTime = 0x1 (except for asynchronous NWAIT mode, DataSetupTime = 0x5) • BusTurnAroundDuration = 0x0 • Capacitive load CL = 30 pF In all timing tables, the Tfmc_ker_ck is the fHCLK clock period. Figure 33. Asynchronous non-multiplexed SRAM/PSRAM/NOR read waveforms 1. Mode 2/B, C and D only. In Mode 1, FMC_NADV is not used. Data FMC_NE FMC_NBL[1:0] FMC_D[15:0] tv(BL_NE) t h(Data_NE) FMC_NOE Address FMC_A[25:0] tv(A_NE) FMC_NWE tsu(Data_NE) tw(NE) MS32753V1 w(NOE) t tv(NOE_NE) t h(NE_NOE) th(Data_NOE) t h(A_NOE) t h(BL_NOE) tsu(Data_NOE) FMC_NADV (1) t v(NADV_NE) tw(NADV) FMC_NWAIT tsu(NWAIT_NE) th(NE_NWAIT) |
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