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ST72321 bảng dữ liệu(PDF) 187 Page - STMicroelectronics

tên linh kiện ST72321
Giải thích chi tiết về linh kiện  64/44-PIN 8-BIT MCU WITH 32 TO 60K FLASH/ROM, ADC,FIVE TIMERS, SPI, SCI, I2C INTERFACE
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nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
Trang chủ  http://www.st.com
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ST72321 bảng dữ liệu(HTML) 187 Page - STMicroelectronics

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15.4.2 LVD Startup behaviour
When the LVD is enabled, the MCU reaches its
authorized operating voltage from a reset state.
However, in some devices, the reset state is re-
leased when VDD is approximately between 0.8V
and 1.5V. As a consequence, the I/Os may toggle
when VDD is within this window.
This may be an issue especially for applications
where the MCU drives power components.
Figure 107. LVD Startup Behaviour
15.4.3 AVD not supported
On some devices with a specific VDD ramp up
speed the AVD may not start. As a result it cannot
generate interrupts when VDD rises and falls.
15.4.4 Internal RC oscillator operation
Internal RC oscillator operation is not supported in
ROM devices.
15.4.5 External clock source with PLL
External clock source is not supported with the
PLL enabled.
15.4.6 Pull-up not present on PE2
Unlike ST72F321 Flash devices, ST72321 ROM
devices have no weak pull-up on port PE2.
In TQFP44 ROM devices, the PE2 pad is not con-
nected to an internal pull-up like other unbonded
pads (See note 4 under Table 1, “Device Pin De-
scription,” on page 10). It is recommended to con-
figure it as output push pull to avoid added current
consumption.
5V
1.5V
VIT+
0.8V
LVD RESET
V D
D
Window
t



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