H838024 datasheet(121/697 Pages) RENESAS

tên linh kiện	H838024

Giải thích chi tiết về linh kiện	Renesas 8-Bit Single-Chip Microcomputer Super Low Power Series

PDF	697 Pages

Scroll/Zoom	100%

nhà sản xuất	RENESAS [Renesas Technology Corp]

Trang chủ	http://www.renesas.com

Logo

121 / 697 page

Section 3 Exception Handling

Rev. 7.00 Mar 10, 2005 page 79 of 652

REJ09B0042-0700

3.3.2

Interrupt Control Registers

Table 3.3 lists the registers that control interrupts.

Table 3.3

Interrupt Control Registers

Name

Abbreviation

R/W

Initial Value

Address

IRQ edge select register

IEGR

R/W

—

H'FFF2

Interrupt enable register 1

IENR1

R/W

—

H'FFF3

Interrupt enable register 2

IENR2

R/W

—

H'FFF4

Interrupt request register 1

IRR1

R/W*

—

H'FFF6

Interrupt request register 2

IRR2

R/W*

—

H'FFF7

Wakeup interrupt request register

IWPR

R/W*

H'00

H'FFF9

Wakeup edge select register

WEGR

R/W

H'00

H'FF90

Note: * Write is enabled only for writing of 0 to clear a flag.

IRQ Edge Select Register (IEGR)

Bit

Initial value

Read/Write



IEG4

R/W

IEG3

R/W

IEG0

R/W



IEG1

R/W

IEGR is an 8-bit read/write register used to designate whether pins

IRQ

, and IRQ0

are set to rising edge sensing or falling edge sensing. For the IRQAEC pin edge sensing

specifications, see section 9.7, Asynchronous Event Counter (AEC).

Bits 7 to 5—Reserved

Bits 7 to 5 are reserved: they are always read as 1 and cannot be modified.

H838024 bảng dữ liệu(PDF) 121 Page - Renesas Technology Corp

H838024 bảng dữ liệu(HTML) 121 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL