PIC18F258-ESLASHLSQTP datasheet(297/402 Pages) MICROCHIP

297 / 402 page

DS41159E-page 295

PIC18FXX8

BTG

Bit Toggle f

Syntax:

[

label ] BTG f,b[,a]

Operands:

≤ f ≤ 255

≤ b ≤ 7

∈ [0,1]

Operation:

(f<b>)

→ f<b>

Status Affected:

None

Encoding:

0111

bbba

ffff

Description:

Bit ‘b’ in data memory location ‘f’ is

inverted. If ‘a’ is ‘0’, the Access Bank will

be selected, overriding the BSR value. If

‘a’ = 1, then the bank will be selected as

per the BSR value (default).

Words:

Cycles:

Q Cycle Activity:

Decode

Read

Process

Data

Write

Example:

BTG

PORTC,

Before Instruction:

PORTC

0111 0101

[0x75]

After Instruction:

PORTC

0110 0101

[0x65]

BOV

Branch if Overflow

Syntax:

[

label ] BOV

Operands:

-128

≤ n ≤ 127

Operation:

if Overflow bit is ‘1’

(PC) + 2 + 2n

→ PC

Status Affected:

None

Encoding:

1110

0100

nnnn

Description:

If the Overflow bit is ‘1’, then the

program will branch.

The 2’s complement number ‘2n’ is

added to the PC. Since the PC will have

incremented to fetch the next instruc-

tion, the new address will be

PC + 2 + 2n. This instruction is then a

two-cycle instruction.

Words:

Cycles:

1(2)

Q Cycle Activity:

If Jump:

Decode

Read literal

‘n’

Process

Data

Write to

operation

If No Jump:

Decode

Read literal

‘n’

Process

Data

operation

Example:

HERE

BOV

JUMP

Before Instruction

address (HERE)

After Instruction

If Overflow

address (JUMP)

If Overflow

address (HERE + 2)

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