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MPC8540 bảng dữ liệu(PDF) 101 Page - Freescale Semiconductor, Inc |
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MPC8540 bảng dữ liệu(HTML) 101 Page - Freescale Semiconductor, Inc |
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101 / 104 page ![]() MPC8540 Integrated Processor Hardware Specifications, Rev. 4 Freescale Semiconductor 101 Device Nomenclature 19 Device Nomenclature Ordering information for the parts fully covered by this specification document is provided in Section 19.1, “Nomenclature of Parts Fully Addressed by this Document.” 19.1 Nomenclature of Parts Fully Addressed by this Document Table 62 provides the Freescale part numbering nomenclature for the MPC8540. Note that the individual part numbers correspond to a maximum processor core frequency. For available frequencies, contact your local Freescale sales office. In addition to the processor frequency, the part numbering scheme also includes an application modifier which may specify special application conditions. Each part number also contains a revision code which refers to the die mask revision number. Table 62. Part Numbering Nomenclature MPC nnnn t pp ff(f) c r Product Code Part Identifier Temperature Range1 Package 2 Processor Frequency 3, 4 Platform Frequency Revision Level MPC 8540 Blank = 0 to 105 °C C = –40 to 105 °C PX = FC-PBGA VT = FC-PBGA (Pb-free) 833 = 833 MHz 667 = 667 MHz L = 333 MHz J = 266 MHz B = Rev. 2.0 (SVR = 0x80300020) C = Rev. 2.1 (SVR = 0x80300021) MPC 8540 Blank = 0 to 105 °C C = –40 to 105 °C PX = FC-PBGA VT = FC-PBGA (Pb-free) AQ = 1.0 GHz F = 333 MHz B = Rev. 2.0 (SVR = 0x80300020) C = Rev. 2.1 (SVR = 0x80300021) Notes: 1.For Temperature Range=C, Processor Frequency is limited to 667 MHz. 2.See Section 14, “Package and Pin Listings,” for more information on available package types. 3.Processor core frequencies supported by parts addressed by this specification only. Not all parts described in this specification support all core frequencies. The core must be clocked at a minimum frequency of 400MHz. A device must not be used beyond the core frequency or platform frequency indicated on the device. 4.Designers should use the maximum power value corresponding to the core and platform frequency grades indicated on the device. A lower maximum power value should not be assumed for design purposes even when running at a lower frequency. |
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