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ST10F276 bảng dữ liệu(PDF) 128 Page - STMicroelectronics

tên linh kiện ST10F276
Giải thích chi tiết về linh kiện  16-bit MCU with MAC unit, 832 Kbyte Flash memory and 68 Kbyte RAM
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ST10F276 bảng dữ liệu(HTML) 128 Page - STMicroelectronics

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System reset
ST10F276
128/229
The start-up configurations and some system features are selected on reset sequences as
described in Table 62 and Figure 42.
Table 62 describes what is the system configuration latched on PORT0 in the six different
reset modes. Figure 42 summarizes the state of bits of PORT0 latched in RP0H, SYSCON,
BUSCON0 registers.
Software Reset (2)
x
0
N
Synch.
Not activated
0
0
0
1
0
x
0
N
Synch.
Not activated
0
0
0
1
0
0
1
Y
Synch.
Not activated
0
0
0
1
0
1
1
Y
Synch.
Activated by internal logic for 1024 TCL
0
0
0
1
0
Watchdog Reset (2)
x
0
N
Synch.
Not activated
0
0
0
1
1
x
0
N
Synch.
Not activated
0
0
0
1
1
0
1
Y
Synch.
Not activated
0
0
0
1
1
1
1
Y
Synch.
Activated by internal logic for 1024 TCL
0
0
0
1
1
1.
It can degenerate into a Long Hardware Reset and consequently differently flagged (see Section 19.3 for details).
2.
When Bidirectional is active (and with RPD=0), it can be followed by a Short Hardware Reset and consequently differently
flagged (see Section 19.6 for details).
Table 61.
Reset event (continued)
Event
RSTIN
WDTCON Flags
min
max
Table 62.
PORT0 latched configuration for the different reset events
X: Pin is sampled
-: Pin is not sampled
PORT0
Sample event
Software Reset
-
-
-
XX
XX
XX
X
-
-
-
-
-
-
Watchdog Reset
-
-
-
XX
XX
XX
X
-
-
-
-
-
-
Synchronous Short Hardware Reset
-
-
-
XX
XX
XX
XXX
XX
XX
Synchronous Long Hardware Reset
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Asynchronous Hardware Reset
X
X
XXX
XX
XX
XXX
XX
XX
Asynchronous Power-On Reset
X
X
XXX
XX
XX
XXX
XX
XX



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