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ST72F262G2B6 bảng dữ liệu(PDF) 150 Page - STMicroelectronics

tên linh kiện ST72F262G2B6
Giải thích chi tiết về linh kiện  8-BIT MCU WITH FLASH OR ROM MEMORY, ADC, TWO 16-BIT TIMERS, I2C, SPI, SCI INTERFACES
PDF  172 Pages
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nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
Trang chủ  http://www.st.com
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ST72F262G2B6 bảng dữ liệu(HTML) 150 Page - STMicroelectronics

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13.9 CONTROL PIN CHARACTERISTICS
13.9.1 Asynchronous RESET Pin
TA = -40 to +85°C unless otherwise specified
Figure 90. Typical IPU on RESET pin
Notes:
1. Data based on characterization results, not tested in production.
2. The IIO current sunk must always respect the absolute maximum rating specified in Section 13.2.2 and the sum of IIO
(I/O ports and control pins) must not exceed IVSS.
3. To guarantee the reset of the device, a minimum pulse has to be applied to the RESET pin. All short pulses applied on
RESET pin with a duration below th(RSTL)in can be ignored.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VIL
Input low level voltage
Vss - 0.3
0.3xVDD
V
VIH
Input high level voltage
0.7xVDD
VDD + 0.3
Vhys
Schmitt trigger voltage hysteresis1)
2.5
V
VOL
Output low level voltage 2)
VDD=5V
IIO=+5mA
0.68
0.95
V
IIO=+2mA
0.28
0.45
RON
Pull-up equivalent resistor
VDD=5V
20
40
80
k
Ω
VDD=3V
85
tw(RSTL)out Generated reset pulse duration
Internal reset sources
30
µs
th(RSTL)in External reset pulse hold time
3)
20
µs
tg(RSTL)in Filtered glitch duration
200
ns
0
50
100
150
200
250
2.43
4
5
5.56
Vdd (V)
T=25C
T=90C
T=-45C



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