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ST72324 bảng dữ liệu(PDF) 128 Page - STMicroelectronics

tên linh kiện ST72324
Giải thích chi tiết về linh kiện  5V RANGE 8-BIT MCU WITH 8 TO 32K FLASH, 10-BIT ADC, 4 TIMERS, SPI, SCI INTERFACE
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ST72324 bảng dữ liệu(HTML) 128 Page - STMicroelectronics

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CLOCK CHARACTERISTICS (Cont’d)
12.6.5 PLL Characteristics
Note:
1. Data characterized but not tested.
The user must take the PLL jitter into account in the application (for example in serial communication or
sampling of high frequency signals). The PLL jitter is a periodic effect, which is integrated over several
CPU cycles. Therefore the longer the period of the application signal, the less it will be impacted by the
PLL jitter.
Figure 68 shows the PLL jitter integrated on application signals in the range 125kHz to 2MHz. At frequen-
cies of less than 125KHz, the jitter is negligible.
Figure 68. Integrated PLL Jitter vs signal frequency1
Note 1: Measurement conditions: fCPU = 8MHz.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
fOSC
PLL input frequency range
2
4
MHz
∆ f
CPU/ fCPU
Instantaneous PLL jitter 1)
Flash ST72F324,
fOSC = 4 MHz.
1.0
2.5
%
Flash ST72F324,
fOSC = 2 MHz.
2.5
4.0
0
0.2
0.4
0.6
0.8
1
1.2
4 MHz
2 MHz
1 MHz 500 kHz 250 kHz 125 kHz
Application Frequency
+/-Jitter (%)
FLASH typ
ROM max
ROM typ
1



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