ST72340 datasheet(128/191 Pages) STMICROELECTRONICS

128 / 191 page

ST72340, ST72344, ST72345

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11.7 I2C TRIPLE SLAVE INTERFACE WITH DMA (I2C3S)

11.7.1 Introduction

The I2C3S interface provides three I2C slave func-

tions, supporting both standard (up to 100kHz)

and fast I2C mode (100 to 400 kHz). Special fea-

tures are provided for:

■ Full-speed emulation of standard I

2C E2PROMs

■ Receiving commands to perform user-defined

operations such as IAP

11.7.2 Main Features

■ Three user configurable independent slave

addresses can be individually enabled

■ 2x 256 bytes and 1x 128 bytes buffers with fixed

addresses in RAM

■ 7-bit Addressing

■ DMA transfer to/from I

2C bus and RAM

■ Standard (transfers 256 bytes at up to 100 kHz)

■ Fast Mode (transfers 256 bytes at up to 400

kHz)

■ Transfer error detection and handling

■ 3 interrupt flags per address for maximum

flexibility

■ Two interrupt request lines (one for Slaves 1

and 2, the other for Slave 3)

■ Full emulation of standard I

2C EEPROMs:

– Supports 5 read/write commands and com-

bined format

–No I2C clock stretching

– Programmable page size (8/16 bytes) or full

buffer

– Configurable write protection

■ Data integrity and byte-pair coherency when

reading 16-bit words from I2C bus

Figure 68. I2C3S Interface Block Diagram

I2C SLAVE ADDRESS 1

I2C SLAVE ADDRESS 2

I2C SLAVE ADDRESS 3

CPU

RAM

128 BYTES

SLAVE 3 BUFFER

256 BYTES

SLAVE 1 BUFFER

256 BYTES

SLAVE 2 BUFFER

DMA

COMPARATOR

CONTROL LOGIC

8-BIT

SHIFT REGISTER

SCL or SCLI

SDA or SDAI

Slave 1 or 2 Interrupt

Slave 3 Interrupt

DATA E2PROM

256 BYTES

SHADOW

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