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UPSD325X bảng dữ liệu(PDF) 133 Page - STMicroelectronics

tên linh kiện UPSD325X
Giải thích chi tiết về linh kiện  Flash Programmable System Devices with 8032 Microcontroller Core and 256Kbit SRAM
PDF  176 Pages
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nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
Trang chủ  http://www.st.com
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UPSD325X bảng dữ liệu(HTML) 133 Page - STMicroelectronics

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µPSD325X DEVICES
Port C – Functionality and Structure
Port C can be configured to perform one or more
of the following functions (see Figure 66):
s
MCU I/O Mode
s
CPLD Output – McellBC7-McellBC0 outputs
can be connected to Port B or Port C.
s
CPLD Input – via the Input Macrocells (IMC)
s
In-System Programming (ISP) – JTAG pins
(TMS, TCK, TDI, TDO) are dedicated pins for
device programming. (See the section entitled
“PROGRAMMING IN-CIRCUIT USING THE
JTAG SERIAL INTERFACE,” page 142, for
more information on JTAG programming.)
s
Open Drain – Port C pins can be configured in
Open Drain Mode
s
Battery Backup features – PC2 can be
configured for a battery input supply, Voltage
Stand-by (VSTBY).
PC4 can be configured as a Battery-on Indicator
(VBATON), indicating when VCC is less than
VBAT.
Port C does not support Address Out Mode, and
therefore no Control Register is required.
Figure 66. Port C Structure
Note: 1. ISP or battery back-up
DATA OUT
REG.
DQ
DQ
WR
WR
MCELLBC[ 7:0]
ENABLE PRODUCT TERM (.OE)
READ MUX
P
D
B
CPLD - INPUT
DIR REG.
INPUT
MACROCELL
ENABLE OUT
SPECIAL FUNCTION
1
SPECIAL FUNCTION
1
CONFIGURATION
BIT
DATA IN
OUTPUT
SELECT
OUTPUT
MUX
PORT C PIN
DATA OUT
AI06618



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