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KSZ9567R bảng dữ liệu(PDF) 106 Page - Microchip Technology

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Giải thích chi tiết về linh kiện  7-Port Gigabit Ethernet Switch with Audio Video Bridging and Two RGMII/MII/RMII Interfaces
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KSZ9567R
DS00002329D-page 106
 2017-2019 Microchip Technology Inc.
5.1.5
GLOBAL SWITCH LOOK UP ENGINE (LUE) CONTROL REGISTERS (0x0400 - 0x04FF)
The following registers are used for accessing the VLAN Table, Address Lookup Table, Static Address Table and the
Reserved Multicast Address Table. The organizations of these tables, and instructions for accessing them, are provided
in Section 5.3, "Tables and MIB Counters (Access)," on page 188.
5.1.5.1
VLAN Table Entry 0 Register
Address:
0x0400 - 0x403
Size:
32 bits
Bits
Description
Type
Default
31
VALID
This field in the VLAN Table specifies if the table entry is valid.
1 = Table entry is valid
0 = Table entry is invalid
R/W
0b
30:28
RESERVED
RO
000b
27
FORWARD OPTION
This field in the VLAN Table specifies how the forwarding ports are
determined.
1 = Forward to the VLAN Table port map (PORT FORWARD field).
0 = Forwarding ports are determined by other variables. It may be the ALU
port map, the VLAN port map, the combination of the two, or the Unknown
Unicast/Multicast feature.
R/W
0b
26:24
PRIORITY
This field in the VLAN Table specifies the priority level.
R/W
000b
23:15
RESERVED
RO
0000_0000_0b
14:12
MSTP INDEX
This field in the VLAN Table specifies the Multiple Spanning Tree Protocol
index.
R/W
000b
11:7
RESERVED
RO
0000_0b
6:0
FID
This field in the VLAN Table specifies the Filter ID. The FID value is normally
combined with the destination address and then hashed to index the address
lookup table.
R/W
000_0000b
Note:
Refer to Section 5.3.4, "VLAN Table," on page 195 for additional information on VLAN tables.



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