SPSB0813 datasheet(114/135 Pages) STMICROELECTRONICS

114 / 135 page

Bit

Name

Description

LIN_TXD_TOUT_EN

LIN TxD timeout detection

0 LIN TxD timeout detection disabled

1 LIN TxD timeout detection enabled (default)

LIN_WU_config

Configuration of LIN wake-up behaviour

0 wake-up at recessive - dominant - recessive with t_dom > 28us (default)

(according to LIN 2.2a and Hardware Requirements for Transceivers version 1.3)

1 wake-up at recessive - dominant or dominant - recessive transition

CANTO_NINT_MASK

0 CAN communication timeout is not masked (default)

1 CAN communication timeout is masked

WU_NINT_MASK

0 Wake-up is not masked (default)

1 Wake-up is masked

DIAGN_EXT

Fail safe output configuration by DIAGN pin

0 Only Fail Safe mode is considered (e.g. Watchdog failure; V1

failure; Thermal Shutdown TSD2) (default).

1 DIAGN pin reflects one or more errors such as reported in the

GLOBAL STATUS BYTE register by Global Status Bit Not

(GSBN)

ICMP_CONFIG_EN

0 writing ICMP = 1 is blocked (writing ICMP=0 is possible); (default)

1 writing ICMP = 1 is possible with next SPI command

bit is automatically reset to 0 after next SPI command

WD_CONFIG_EN

0 writing to WD Configuration (CR2 [0:1] is blocked (default)

1 writing to WD Configuration Bits is possible with next SPI command

bit is automatically reset to 0 after next SPI command

RES

reserved

RES

reserved

MASK_TW

0 Thermal warning is not masked (default)

1 Thermal warning is masked

i.e. it is reported as a Global Warning (GSB bit 1) but not as a

Global Error (GSB bit 7)

MASK_RSTB

0 V1_UV Reset condition is not masked (default)

1 V1_UV Reset condition is masked

i.e. reported as a Reset (GSB bit 6) but not as a

Global Error (GSB bit 7)

MASK_OL

0 Open load condition at all outputs are not masked (default)

1 Open load condition at all outputs are masked

i.e. it is reported as a Functional Error (GSB bit 27) but not as a Global Error (GSB bit 31)

RES

reserved

MASK_PLE

0 Physical Layer Errors are not masked (default)

1 Physical Layer Errors are masked

i.e. reported as a Physical Layer Error (GSB bit 4) but not as a

Global Error (GSB bit 7)

MASK_GW

0 Global Warning conditions are not masked (default)

1 Global Warning conditions are masked

i.e. reported as a Global Warning (GSB bit 1) but not as a

SPSB081

Control registers

DS14048 - Rev 1

page 114/135

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