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AM6548 bảng dữ liệu(PDF) 240 Page - Texas Instruments

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tên linh kiện AM6548
Giải thích chi tiết về linh kiện  AM654x, AM652x Sitara™ Processors Silicon Revision 2.1
PDF  284 Pages
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Trang chủ  http://www.ti.com
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AM6548 bảng dữ liệu(HTML) 240 Page - Texas Instruments

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NO.
MODE
MIN
MAX
UNIT
PRRG2
tw(RXCH)
Pulse duration, RXC high
10 Mbps
160
240
ns
100 Mbps
16
24
ns
1000 Mbps
3.6
4.4
ns
PRRG3
tw(RXCL)
Pulse duration, RXC low
10 Mbps
160
240
ns
100 Mbps
16
24
ns
1000 Mbps
3.6
4.4
ns
RGMII_RXC
PRRG2
PRRG3
PRRG1
SPRS91x_TIMING_PRU_RGMII_RT_04
PRRG4
Figure 7-114. PRU_ICSSG RGMII_RCLK Timing Requirements
7.9.5.21.6.2.2 PRU_ICSSG RGMII Timing Requirements - RGMII_RD[3:0] and RGMII_RX_CTL
NO.
PARAMETER
DESCRIPTION
MODE
MIN
MAX
UNIT
PRRG5
tsu(RD-RXC)
Setup time, RD[3:0] valid before RXC high/low
10 Mbps
100 Mbps
1000 Mbps
1
ns
tsu(RX_CTL-RXC)
Setup time, RX_CTL valid before RXC high/low
10 Mbps
100 Mbps
1000 Mbps
1
ns
PRRG6
th(RXC-RD)
Hold time, RD[3:0] valid after RXC high/low
10 Mbps
100 Mbps
1000 Mbps
1.15
ns
th(RXC-RX_CTL)
Hold time, RX_CTL valid after RXC high/low
10 Mbps
100 Mbps
1000 Mbps
1.15
ns
SPRS91x_TIMING_PRU_RGMII_RT_05
RGMII_RXCLK (Input)
PRPG5
PRPG6
RGMII_RXD[3:0],
RGMII_RXDV,
RGMII_RXER (Inputs)
PRPG7
Figure 7-115. PRU_ICSSG RGMII_RD[3:0] and RGMII_RX_CTL Timing Requirements
7.9.5.21.6.2.3 PRU_ICSSG RGMII Switching Characteristics - RGMII_TXC
NO.
PARAMETER
DESCRIPTION
MODE
MIN
MAX
UNIT
PRRG8
tc(TXC)
Cycle time, TXC
10 Mbps
360
440
ns
100 Mbps
36
44
ns
1000 Mbps
7.2
8.8
ns
PRRG9
tw(TXCH)
Pulse duration, TXC high
10 Mbps
160
240
ns
100 Mbps
16
24
ns
1000 Mbps
3.6
4.4
ns
AM6548, AM6528, AM6546, AM6526
SPRSP52B – DECEMBER 2019 – REVISED JUNE 2021
www.ti.com
240
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Product Folder Links: AM6548 AM6528 AM6546 AM6526



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