D301 datasheet(240/416 Pages) MICROCHIP

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PIC24FJ256GA705 FAMILY

DS30010118D-page 240

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20.1

Memory Addressable in Different

Modes

The memory space addressable by the device

depends on the address/data multiplexing selection; it

varies from 1K to 2 MB. Refer to Table 20-1 for different

Memory-Addressable modes.

20.2

PMDOUT1 and PMDOUT2

Registers

The EPMP Data Output 1 and Data Output 2 registers

are used only in Slave mode. These registers act as a

buffer for outgoing data.

20.3

PMDIN1 and PMDIN2 Registers

The EPMP Data Input 1 and Data Input 2 registers are

used in Slave modes to buffer incoming data. These

registers hold data that is asynchronously clocked in. In

Master mode, PMDIN1 is the holding register for

incoming data.

TABLE 20-1:

EPMP FEATURE DIFFERENCES BY DEVICE PIN COUNT

Data Port Size

PMA<9:8>

PMA<7:0>

PMD<7:4>

PMD<3:0>

Accessible Memory

Demultiplexed Address (ADRMUX<1:0> = 00)

8-Bit (PTSZ<1:0> = 00)

Addr<9:8>

Addr<7:0>

Data

4-Bit (PTSZ<1:0> = 01)

Addr<9:8>

Addr<7:0>

—

Data

1 Address Phase (ADRMUX<1:0> = 01)

8-Bit (PTSZ<1:0> = 00)

—

PMALL

Addr<7:0> Data

4-Bit (PTSZ<1:0> = 01)

Addr<9:8>

PMALL

Addr<7:4>

Addr<3:0>

—Data (1)

2 Address Phases (ADRMUX<1:0> = 10)

8-Bit (PTSZ<1:0> = 00)

—

PMALL

Addr<7:0>

64K

PMALH

Addr<15:8>

—Data

4-Bit (PTSZ<1:0> = 01)

Addr<9:8>

PMALL

Addr<3:0>

PMALH

Addr<7:4>

—Data

3 Address Phases (ADRMUX<1:0> = 11)

8-Bit (PTSZ<1:0> = 00)

—

PMALL

Addr<7:0>

2 Mbytes

PMALH

Addr<15:8>

PMALU

Addr<22:16>

—Data

4-Bit (PTSZ<1:0> = 01)

Addr<13:12>

PMALL

Addr<3:0>

16K

PMALH

Addr<7:4>

PMALU

Addr<11:8>

—Data

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