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D301 bảng dữ liệu(PDF) 210 Page - Microchip Technology |
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D301 bảng dữ liệu(HTML) 210 Page - Microchip Technology |
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210 / 416 page ![]() PIC24FJ256GA705 FAMILY DS30010118D-page 210 2016-2018 Microchip Technology Inc. bit 2 Unimplemented: Read as ‘0’ bit 1 SPITBF: SPIx Transmit Buffer Full Status bit 1 = SPIxTXB is full 0 = SPIxTXB not full Standard Buffer Mode: Automatically set in hardware when SPIxBUF is written, loading SPIxTXB. Automatically cleared in hardware when SPIx transfers data from SPIxTXB to SPIxTXSR. Enhanced Buffer Mode: Indicates TXELM<5:0> = 6’b111111. bit 0 SPIRBF: SPIx Receive Buffer Full Status bit 1 = SPIxRXB is full 0 = SPIxRXB is not full Standard Buffer Mode: Automatically set in hardware when SPIx transfers data from SPIxRXSR to SPIxRXB. Automatically cleared in hardware when SPIxBUF is read from, reading SPIxRXB. Enhanced Buffer Mode: Indicates RXELM<5:0> = 6’b111111. REGISTER 17-4: SPIxSTATL: SPIx STATUS REGISTER LOW (CONTINUED) Note 1: SPITUR is cleared when SPIEN = 0. When IGNTUR = 1, SPITUR provides dynamic status of the Transmit Underrun condition, but does not stop RX/TX operation and does not need to be cleared by software. |
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