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STM32L053C6 bảng dữ liệu(PDF) 105 Page - STMicroelectronics

tên linh kiện STM32L053C6
Giải thích chi tiết về linh kiện  Ultra-low-power 32-bit MCU Arm®-based Cortex®-M0, up to 64KB Flash, 8KB SRAM, 2KB EEPROM, LCD, USB, ADC, DAC
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nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
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STM32L053C6 bảng dữ liệu(HTML) 105 Page - STMicroelectronics

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DS10152 Rev 9
105/136
STM32L053x6 STM32L053x8
Electrical characteristics
113
Table 73. SPI characteristics in voltage Range 2 (1)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
fSCK
1/tc(SCK)
SPI clock frequency
Master mode
--
8
MHz
Slave mode Transmitter
1.65<VDD<3.6V
8
Slave mode Transmitter
2.7<VDD<3.6V
8(2)
Duty(SCK)
Duty cycle of SPI clock
frequency
Slave mode
30
50
70
%
tsu(NSS)
NSS setup time
Slave mode, SPI presc = 2
4*Tpclk
-
-
ns
th(NSS)
NSS hold time
Slave mode, SPI presc = 2
2*Tpclk
-
-
tw(SCKH)
tw(SCKL)
SCK high and low time
Master mode
Tpclk-2
Tpclk
Tpclk+2
tsu(MI)
Data input setup time
Master mode
0
-
-
tsu(SI)
Slave mode
3
-
-
th(MI)
Data input hold time
Master mode
11
-
-
th(SI)
Slave mode
4.5
-
-
ta(SO
Data output access time
Slave mode
18
-
52
tdis(SO)
Data output disable time
Slave mode
12
-
42
tv(SO)
Data output valid time
Slave mode
-
20
56.5
tv(MO)
Master mode
-
5
9
th(SO)
Data output hold time
Slave mode
13
-
-
th(MO)
Master mode
3
-
-
1. Guaranteed by characterization results.
2. The maximum SPI clock frequency in slave transmitter mode is determined by the sum of tv(SO) and tsu(MI) which has to fit
into SCK low or high phase preceding the SCK sampling edge. This value can be achieved when the SPI communicates
with a master having tsu(MI) = 0 while Duty(SCK) = 50%.



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