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32G474 bảng dữ liệu(PDF) 136 Page - STMicroelectronics |
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32G474 bảng dữ liệu(HTML) 136 Page - STMicroelectronics |
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136 / 236 page ![]() Electrical characteristics STM32G474xB STM32G474xC STM32G474xE 136/236 DS12288 Rev 4 Figure 27. Recommended NRST pin protection 1. The reset network protects the device against parasitic resets. 2. The user must ensure that the level on the NRST pin can go below the VIL(NRST) max level specified in Table 58: NRST pin characteristics. Otherwise the reset is not taken into account by the device. 3. The external capacitor on NRST must be placed as close as possible to the device. 5.3.16 High-resolution timer (HRTIM) The parameters given in Table 59 are derived from tests performed under ambient temperature and supply voltage conditions summarized in Table 17. MS19878V3 RPU VDD Internal reset External reset circuit (1) NRST (2) Filter 0.1 μF Table 59. HRTIM characteristics(1) 1. Data based on characterization results, not tested in production. Symbol Parameter Conditions Min. Typ. Max. Unit TA Timer ambient temperature range fHRTIM=170 MHz -40 - 125 °C fHRTIM HRTIM input clock for DLL calibration As per TA conditions -- 170 MHz tHRTIM 5.88 - - ns tRES(HRTIM) high-resolution step size fHRTIM=170 MHz, TA from -40 to 105°C - 184 - ps ResHRTIM Timer resolution - - - 16 bit tDTG Dead time generator clock period -0.125 - 16 tHRTIM fHRTIM=170 MHz 0.735 - 94.1 ns |tDTR| / |tDTF| max Dead time range (absolute value) -- - 511 tDTG fHRTIM=170 MHz - - 48.09 µs fCHPFRQ Chopper stage clock frequency - 1/256 - 1/16 fHRTIM fHRTIM=170 MHz 0.664 - 10.625 MHz t1STPW Chopper first pulse length -16 - 256 tHRTIM fHRTIM=170 MHz 0.094 - 1.506 µs |
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