VSC7440 datasheet(389/444 Pages) MICROSEMI

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Electrical Specifications

VMDS-10492 VSC7440 Datasheet Revision 4.2

372

6.1.3.1

DDR3 SDRAM Interface

The following table lists the DC specifications for the SDRAM interface signals in DDR3 operation.

6.1.3.2

DDR3L SDRAM Interface

The following table lists the DC specifications for the SDRAM interface signals in DDR3L operation.

6.1.4

SERDES1G

This section describes the DC specifications for the SERDES1G transceiver. The transceiver supports

100BASE-FX, SFP, 1000BASE-KX, and SGMII modes.

Table 277 •

DDR3 SDRAM Signals

Parameter

Symbol

Minimum

Maximum

Unit

Condition

Input reference voltage1

DDR_VREF is expected to track variations in VDD_IODDR. Peak-to-peak AC noise on DDR_VREF must not exceed ±2% of

DDR_VREF.

DDR_VREF 49% VDD_IODDR 51% VDD_IODDR VVDD_IODDR =1.5 V.

Input voltage high

VIH(DC)

DDR_VREF +

0.100

VDD_IODDR

Input voltage low

VIL(DC)

–0.3

DDR_VREF –

0.100

Output voltage high

VOH(DC)

0.8 × VDD_IODDR

Not terminated, 1 pF load.

Output voltage low

VOL(DC)

–0.3

0.2 × VDD_IODDR V

Not terminated, 1 pF load.

Input leakage current

|IL|40

µA

0 V

≤ VI ≤ VDD_IODDR.

Output source DC current2

With 34

Ω output driver impedance.

IOH

–6

External 40

Ω termination to

VDD_IODDR/2.

Output sink DC current2

IOL

External 40

Ω termination to

VDD_IODDR/2.

Table 278 •

DDR3L SDRAM Signals

Parameter

Symbol

Minimum

Maximum

Unit

Condition

Input reference voltage1

DDR_VREF is expected to track variations in VDD_IODDR. Peak-to-peak AC noise on DDR_VREF must not exceed ±2% of

DDR_VREF.

DDR_VREF 49% VDD_IODDR 51% VDD_IODDR

VVDD_IODDR =1.35V.

Input voltage high

VIH(DC)

DDR_VREF +

0.09

VDD_IODDR

Input voltage low

VIL(DC)

–0.3

DDR_VREF –0.09 V

Output voltage high

VOH(DC)

0.8 × VDD_IODDR

Not terminated, 1 pF load.

Output voltage low

VOL(DC)

0.2 × VDD_IODDR V

Not terminated, 1 pF load.

Input leakage current

|IL|40

µA

0 V

≤ VI ≤ VDD_IODDR.

Output source DC current2

With 34

Ω output driver impedance.

IOH

–6

External 40

Ω termination

to VDD_IODDR/2

Output sink DC current2

IOL

External 40

Ω termination

to VDD_IODDR/2

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