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VSC7440 bảng dữ liệu(PDF) 375 Page - Microsemi Corporation

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VCore-III System and CPU Interfaces
VMDS-10492 VSC7440 Datasheet Revision 4.2
358
The output mode can additionally be modified with PWM (SIO_PORT_CFG.PWM_SOURCE) and
configurable polarity (SIO_PORT_CFG.BIT_POLARITY).
Static Mode The static mode is used to assign a fixed value to the SGPIO, for example, fixed 0 or
fixed 1.
Blink Mode The blink mode makes the SGPIO blink at a fixed rate. The SIO controller features two
blink modes that can be set independently. A SGPIO can then be configured to use either blink mode 0
or blink mode 1. The blink outputs are configured in SIO_CFG.SIO_BMODE_0 and
SIO_CFG.SIO_BMODE_1. To synchronize the blink modes between different devices, reset the blink
counter using SIO_CFG.SIO_BLINK_RESET. All the SIO controllers on a device must be reset at same
time to maintain the synchronization. The burst toggle mode of blink mode 1 toggles the output with
every burst.
Link Activity Mode The link activity mode makes the output blink when there is activity on the port
module (Rx or Tx). The following table lists the mapping between the SIO port number and port modules.
Table 264 •
Blink Modes
Register
Description
Blink Mode 0
0: 20 Hz blink frequency
1: 10 Hz blink frequency
2: 5 Hz blink frequency
3: 2.5 Hz blink frequency
Blink Mode 1
0: 20 Hz blink frequency
1: 10 Hz blink frequency
2: 5 Hz blink frequency
3: Burst toggle
Table 265 •
SIO Controller Port Mapping
SIO Port
SG0 Mapping
0
Port module 0
1
Port module 1
2
Port module 2
3
Port module 3
4
Port module 4
5
Port module 5
6
Port module 6
7
Port module 7
8
Port module 8
9
Port module 9
10
Port module 10
11
Free
12
Free
13
Free
14
Free
15
Free
16
Free
17
Free



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