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STM32MP151AAA3 bảng dữ liệu(PDF) 215 Page - STMicroelectronics

tên linh kiện STM32MP151AAA3
Giải thích chi tiết về linh kiện  Arm® Cortex®-A7 800 MHz Cortex®-M4 MPU, TFT, 35 comm. interfaces, 25 timers, adv. analog
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STM32MP151A/D
Electrical characteristics
232
Figure 46. SPI timing diagram - slave mode and CPHA = 0
tsu(MI)
Data input setup time
Master mode
1
-
-
ns
tsu(SI)
Slave mode
2
-
-
th(MI)
Data input hold time
Master mode
3
-
-
th(SI)
Slave mode
1
-
-
ta(SO)
Data output access time Slave mode
9
11
16
tdis(SO)
Data output disable time Slave mode
3
5
7.5
tv(SO)
Data output valid time
Slave mode
2.7 V ≤ VDD ≤ 3.6 V
-11
13
Slave mode
1.71 V ≤ VDD ≤ 3.6 V
-11
14
tv(MO)
Master mode
-
1.5
2.5
th(SO)
Data output hold time
Slave mode
1.71 V ≤ VDD ≤ 3.6 V
8-
-
th(MO)
Master mode
1
-
-
1. Guaranteed by characterization results.
2. Maximum frequency in slave transmitter mode is determined by the sum of tv(SO) and tsu(MI) which has to fit into SCK low or
high phase preceding the SCK sampling edge. This value can be achieved when the SPI communicates with a master
having tsu(MI) = 0 while Duty(SCK) = 50%.
Table 98. SPI dynamic characteristics(1) (continued)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
MSv41658V1
NSS input
CPHA=0
CPOL=0
CPHA=0
CPOL=1
MISO output
MOSI input
tsu(SI)
th(SI)
tw(SCKL)
tw(SCKH)
tc(SCK)
tr(SCK)
th(NSS)
tdis(SO)
tsu(NSS)
ta(SO)
tv(SO)
Next bits IN
Last bit OUT
First bit IN
First bit OUT
Next bits OUT
th(SO)
tf(SCK)
Last bit IN



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