công cụ tìm kiếm bảng dữ liệu linh kiện điện tử
  Vietnamese  ▼
ALLDATASHEET.VN

X  

Preview PDF HTML

STM32L4P5CE bảng dữ liệu(PDF) 241 Page - STMicroelectronics

tên linh kiện STM32L4P5CE
Giải thích chi tiết về linh kiện  Ultra-low-power Arm®Cortex®-M4 32-bit MCUFPU, 150 DMIPS, up to 1-MB Flash memory, 320-KB SRAM, LCD-TFT, ext. SMPS
PDF  310 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
Trang chủ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32L4P5CE bảng dữ liệu(HTML) 241 Page - STMicroelectronics

Back Button STM32L4P5CE Datasheet HTML 237Page - STMicroelectronics STM32L4P5CE Datasheet HTML 238Page - STMicroelectronics STM32L4P5CE Datasheet HTML 239Page - STMicroelectronics STM32L4P5CE Datasheet HTML 240Page - STMicroelectronics STM32L4P5CE Datasheet HTML 241Page - STMicroelectronics STM32L4P5CE Datasheet HTML 242Page - STMicroelectronics STM32L4P5CE Datasheet HTML 243Page - STMicroelectronics STM32L4P5CE Datasheet HTML 244Page - STMicroelectronics STM32L4P5CE Datasheet HTML 245Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 241 / 310 page
background image
DS12903 Rev1
241/310
STM32L4P5xx
Electrical characteristics
277
Figure 42. SPI timing diagram - slave mode and CPHA = 0
tdis(SO) Data output disable time Slave mode
9
-
16
ns
tv(SO)
Data output valid time
Slave mode 2.7 V < VDD < 3.6 V
Voltage Range V1
-
13
15.5
Slave mode 1.71 V < VDD < 3.6 V
Voltage Range V1
-11
23
Slave mode 1.71 V < VDD < 3.6 V
Voltage Range V2
-13
22
Slave mode(3)
1.08 V < VDD < 1.32 V
-27
30
tv(MO)
Master mode
-
2
4
th(SO)
Data output hold time
Slave mode 1.71 V < VDD < 3.6 V
9
-
-
Slave mode(3)
1.08 < VDD < 1.32 V
24
-
-
th(MO)
Master mode
1
-
-
1. Guaranteed by characterization results.
2. The maximum frequency in Slave transmitter mode is determined by the sum of tv(SO) and tsu(MI) which has to fit into
SCK low or high-phase preceding the SCK sampling edge. This value can be achieved when the SPI communicates with a
master having tsu(MI) = 0 while Duty(SCK) = 50%.
3. SPI mapped on GPIOG port which is supplied by VDDIO2 specified down to 1.08V. SPI is tested in this voltage.
Table 96. SPI characteristics(1) (continued)
Symbol
Parameter
Conditions
Min
Typ
Max(2)
Unit
MSv41658V1
NSS input
CPHA=0
CPOL=0
CPHA=0
CPOL=1
MISO output
MOSI input
tsu(SI)
th(SI)
tw(SCKL)
tw(SCKH)
tc(SCK)
tr(SCK)
th(NSS)
tdis(SO)
tsu(NSS)
ta(SO)
tv(SO)
Next bits IN
Last bit OUT
First bit IN
First bit OUT
Next bits OUT
th(SO)
tf(SCK)
Last bit IN



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


bảng dữ liệu tải về

Go To PDF Page


Link URL



Cho đến nay ALLDATASHEET có giúp ích cho doanh nghiệp của bạn hay không?  [ DONATE ] 

Alldatasheet là   |   Quảng cáo   |   Liên lạc với chúng tôi   |   Chính sách bảo mật   |   Liên kết đến bảng dữ liệu    |   Trao đổi link   |   Tìm kiếm theo nhà sản xuất
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com