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STM32H742VG bảng dữ liệu(PDF) 186 Page - STMicroelectronics

tên linh kiện STM32H742VG
Giải thích chi tiết về linh kiện  32-bit Arm® Cortex®-M7 480MHz MCUs, up to 2MB Flash, up to 1MB RAM, 46 com. and analog interfaces
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STM32H742VG bảng dữ liệu(HTML) 186 Page - STMicroelectronics

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Electrical characteristics (rev Y)
STM32H742xI/G STM32H743xI/G
186/357
DS12110 Rev 7
6.3.28
Digital filter for Sigma-Delta Modulators (DFSDM) characteristics
Unless otherwise specified, the parameters given in Table 100 for DFSDM are derived from
tests performed under the ambient temperature, fPCLKx frequency and VDD supply voltage
summarized in Table 24: General operating conditions, with the following configuration:
•
Output speed is set to OSPEEDRy[1:0] = 10
•
Capacitive load C = 30 pF
•
Measurement points are done at CMOS levels: 0.5VDD
Refer to Section 6.3.15: I/O port characteristics for more details on the input/output alternate
function characteristics (DFSDMx_CKINx, DFSDMx_DATINx, DFSDMx_CKOUT for
DFSDMx).
Table 100. DFSDM measured timing 1.62-3.6 V(1)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
fDFSDMCLK
DFSDM clock
1.62 V < VDD < 3.6 V
-
-
133
MHz
fCKIN
(1/TCKIN)
Input clock
frequency
SPI mode (SITP[1:0]=0,1),
External clock mode
(SPICKSEL[1:0]=0),
1.62 V < VDD < 3.6 V
--
20
(fDFSDMCLK/4)
SPI mode (SITP[1:0]=0,1),
External clock mode
(SPICKSEL[1:0]=0),
2.7 < VDD < 3.6 V
--
20
(fDFSDMCLK/4)
SPI mode (SITP[1:0]=0,1),
Internal clock mode
(SPICKSEL[1:0]
≠0),
1.62 < VDD < 3.6 V
--
20
(fDFSDMCLK/4)
SPI mode (SITP[1:0]=0,1),
Internal clock mode
(SPICKSEL[1:0]
≠0),
2.7 < VDD < 3.6 V
--
20
(fDFSDMCLK/4)
fCKOUT
Output clock
frequency
1.62 < VDD < 3.6 V
-
-
20
DuCyCKOUT
Output clock
frequency duty
cycle
1.62 < VDD < 3.6 V
45
50
55
%



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