STM32L4A6VG datasheet(180/282 Pages) STMICROELECTRONICS

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Electrical characteristics

STM32L4A6xG

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DS11584 Rev 8

Ilkg(4)

FT_xx input leakage

current(3)(5)

VIN ≤ Max(VDDXXX)(6)(7)

±100

Max(VDDXXX) ≤ VIN ≤

Max(VDDXXX)+1 V(6)(7)

650

Max(VDDXXX)+1 V < VIN ≤

5.5 V(6)(7)

200

FT_lu, FT_u, PB2 and

PC3 IO

VIN ≤ Max(VDDXXX) (6)(7)

±150

Max(VDDXXX) ≤ VIN ≤

Max(VDDXXX)+1 V(6)(7)

2500(3)

Max(VDDXXX)+1 V < VIN ≤

5.5 V(6)(7)

250

TT_xx input leakage

current

VIN ≤ Max(VDDXXX)(6)

±150

Max(VDDXXX) ≤ VIN < 3.6 V(6)

2000(3)

OPAMPx_VINM

(x=1,2) dedicated

input leakage current

(UFBGA132 only)

(8)

RPU

Weak pull-up

equivalent resistor (9)

VIN = VSS

kΩ

RPD

Weak pull-down

equivalent resistor(9)

VIN = VDDIOx

kΩ

CIO

I/O pin capacitance

1. Refer to Figure 32: I/O input characteristics.

2. Guaranteed by test production.

3. Guaranteed by design.

4. This value represents the pad leakage of the IO itself. The total product pad leakage is provided by this formula:

ITotal_Ileak_max = 10 µA + [number of IOs where VIN is applied on the pad] ₓ Ilkg(Max).

5. All FT_xx GPIOs except FT_lu, FT_u, PB2 and PC3.

6. Max(VDDXXX) is the maximum value of all the I/O supplies.

7. To sustain a voltage higher than Min(VDD, VDDA, VDDIO2, VDDUSB, VLCD) +0.3 V, the internal Pull-up and Pull-Down

resistors must be disabled.

8. Refer to Ibias in Table 86: OPAMP characteristics for the values of the OPAMP dedicated input leakage current.

9. Pull-up and pull-down resistors are designed with a true resistance in series with a switchable PMOS/NMOS. This

PMOS/NMOS contribution to the series resistance is minimal (~10% order).

Table 70. I/O static characteristics (continued)

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

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