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STM32MP157C bảng dữ liệu(PDF) 176 Page - STMicroelectronics

tên linh kiện STM32MP157C
Giải thích chi tiết về linh kiện  Arm® dual Cortex®-A7 650 MHz Cortex®-M4 MPU, 3D GPU, TFT/DSI, 37 comm. interfaces, 29 timers, adv. analog, crypto
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nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
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STM32MP157C bảng dữ liệu(HTML) 176 Page - STMicroelectronics

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Electrical characteristics
STM32MP157C
176/258
DS12505 Rev 2
Asynchronous waveforms and timings
Figure 25 through Figure 28 represent asynchronous waveforms and Table 59 through
Table 66 provide the corresponding timings. The results shown in these tables are obtained
with the following FMC configuration:
•
AddressSetupTime = 0x1
•
AddressHoldTime = 0x1
•
DataSetupTime = 0x1 (except for asynchronous NWAIT mode, DataSetupTime = 0x5)
•
DataHoldTime = 0x1 (1×Tfmc_ker_ck for read operations and 2×Tfmc_ker_ck for write
operations)
•
ByteLaneSetup = 0x1
•
BusTurnAroundDuration = 0x0
•
Capacitive load CL = 30 pF
In all the timing tables, the Tfmc_ker_ck is the fmc_ker_ck clock period.
Figure 25. Asynchronous non-multiplexed SRAM/PSRAM/NOR read waveforms
1. Mode 2/B, C and D only. In Mode 1, FMC_NADV is not used.
Data
FMC_NE
FMC_NBL[1:0]
FMC_D[15:0]
tv(BL_NE)
t h(Data_NE)
FMC_NOE
Address
FMC_A[25:0]
tv(A_NE)
FMC_NWE
tsu(Data_NE)
tw(NE)
MS32753V1
w(NOE)
t
tv(NOE_NE)
t h(NE_NOE)
th(Data_NOE)
t h(A_NOE)
t h(BL_NOE)
tsu(Data_NOE)
FMC_NADV (1)
t v(NADV_NE)
tw(NADV)
FMC_NWAIT
tsu(NWAIT_NE)
th(NE_NWAIT)



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