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STR720 bảng dữ liệu(PDF) 265 Page - STMicroelectronics

tên linh kiện STR720
Giải thích chi tiết về linh kiện  ARM720T 16/32-BIT MCU WITH 16K RAM, USB, CAN, 3 TIMERS, ADC, 6 COMMUNICATIONS INTERFACES
PDF  401 Pages
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nhà sản xuất  STMICROELECTRONICS [STMicroelectronics]
Trang chủ  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STR720 bảng dữ liệu(HTML) 265 Page - STMicroelectronics

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STR720 - USB SLAVE INTERFACE (USB)
265/401
19.4 Functional Description
The USB Peripheral provides an USB compliant connection between the host PC and the
function implemented by the microcontroller. Data transfer between the host PC and the
system memory occurs through a dedicated packet buffer memory accessed directly by the
USB Peripheral. The size of this dedicated buffer memory must be according to the number of
endpoints used and the maximum packet size. In this implementation, the dedicated memory
of 512 Byte and up to 8 endpoints can be used. The USB Peripheral interfaces with the USB
host, detecting token packets, handling data transmission/reception, and processing
handshake packets as required by the USB standard. Transaction formatting is performed by
the hardware, including CRC generation and checking.
Each endpoint is associated with a buffer description block indicating where the endpoint
related memory area is located, how large it is or how many bytes must be transmitted. When
a token for a valid function/endpoint pair is recognized by the USB Peripheral, the related data
transfer (if required and if the endpoint is configured) takes place. The data buffered by the
USB Peripheral is loaded in an internal 16 bit register and memory access to the dedicated
buffer is performed. When all the data has been transferred, if needed, the proper handshake
packet over the USB is generated or expected according to the direction of the transfer.
At the end of the transaction, an endpoint-specific interrupt is generated, reading status
registers and/or using different interrupt response routines. The microcontroller can
determine:
which endpoint has to be served
which type of transaction took place, if errors occurred (bit stuffing, format, CRC, protocol,
missing ACK, over/underrun, etc).
Two interrupt lines are generated by the USB Peripheral : one IRQ collecting high priority
endpoint interrupts (isochronous and double-buffered bulk) and another IRQ collecting all
other interrupt sources (check the IRQ interrupt vector table for detailed interrupt source
mapping).
Special support is offered to Isochronous transfers and high throughput bulk transfers,
implementing a double buffer usage, which allows to always have an available buffer for the
USB Peripheral while the microcontroller uses the other one.
The unit can be placed in low-power mode (SUSPEND mode), by writing in the control
register, whenever required. At this time, all static power dissipation is avoided, and the USB
clock can be slowed down or stopped. The detection of activity at the USB inputs, while in
low-power mode, wakes the device up asynchronously. A special interrupt source can be
connected directly to a wake-up line to allow the system to immediately restart the normal
clock generation and/or support direct clock start/stop.
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