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AR8327-AL1A-R bảng dữ liệu(PDF) 386 Page - List of Unclassifed Manufacturers

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Giải thích chi tiết về linh kiện  Seven-port Gigabit Ethernet Switch
PDF  394 Pages
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AR8327-AL1A-R bảng dữ liệu(HTML) 386 Page - List of Unclassifed Manufacturers

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386 • AR8327/AR8327N Seven-port Gigabit Ethernet Switch
Atheros Communications, Inc.
386 • June 2011
COMPANY CONFIDENTIAL
Table 4-5.
XTAL/OSC Timing
4.5.2
MII Timing
Figure 4-3 shows the MII timing diagram.
Table 4-6.
MII Timing
Symbol
Parameter
Min
Typ
Max
Unit
T_XI_PER
XI/OSCI Clock Period
40.0 -
50ppm
40.0
40.0 +
50ppm
ns
T_XI_HI
XI/OSCI Clock High
14
20.0
ns
T_XI_LO
XI/OSCI Clock Low
14
20.0
ns
T_XI_RISE
XI/OSCI Clock Rise Time, VIL (max)
to VIH (min)
4ns
T_XI_FALL
XI/OSCI Clock Fall time, VIL (max)
to VIH (min)
4ns
V_IH_XI
The XTLI input high level
0.8
1.4
V
V_IL_XI
The xtli input low lever voltage
-0.3
0.15
V
Figure 4-3.
100BASE-TX MII Input Timing Diagram
TXCLK/RXCLK
TXEN
TXD[3:0]
ttxhold
ttxsu
tmiick
RXDV
RXD[3:0]
trxdly
Symbol
Parameter
Min
Typ
Max
Unit
tmiick
TXCLK/RXCLK Period
40
ns
ttxsu
TXEN and TXD to TXCLK rising
setup
10
ns
ttxhold
TXEN and TXD to TXCLK rising
hold
10
ns
ttxdly
RXCLK falling to RXDV, and RXD
Output Delay
08
ns



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