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AM652X bảng dữ liệu(PDF) 228 Page - Texas Instruments

tên linh kiện AM652X
Giải thích chi tiết về linh kiện  Sitara Processors
PDF  299 Pages
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AM652X bảng dữ liệu(HTML) 228 Page - Texas Instruments

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RGMII_RXC
PRRG2
PRRG3
PRRG1
SPRS91x_TIMING_PRU_RGMII_RT_04
PRRG4
228
AM6548, AM6528, AM6546
AM6526, AM6527
SPRSP08E – NOVEMBER 2017 – REVISED OCTOBER 2018
www.ti.com
Submit Documentation Feedback
Product Folder Links: AM6548 AM6528 AM6546 AM6526 AM6527
Specifications
Copyright © 2017–2018, Texas Instruments Incorporated
Table 5-112. PRU-ICSSG RGMII Timing Requirements - RGMII_RCLK
NO.
PARAMETER
DESCRIPTION
MODE
MIN
MAX
UNIT
PRRG1
tc(RXC)
Cycle time, RXC
10 Mbps
TBD
TBD
ns
100 Mbps
TBD
TBD
ns
1000 Mbps
7.2
8.8
ns
PRRG2
tw(RXCH)
Pulse duration, RXC high
10 Mbps
TBD
TBD
ns
100 Mbps
TBD
TBD
ns
1000 Mbps
3.6
4.4
ns
PRRG3
tw(RXCL)
Pulse duration, RXC low
10 Mbps
TBD
TBD
ns
100 Mbps
TBD
TBD
ns
1000 Mbps
3.6
4.4
ns
PRRG4
tt(RXC)
Transition time, RXC
10 Mbps
TBD
ns
100 Mbps
TBD
ns
1000 Mbps
0.75
ns
Figure 5-121. PRU_ICSSG RGMII_RCLK Input Timing
Table 5-113. PRU-ICSSG RGMII Timing Requirements - RGMII_RD[3:0] and RGMII_RCTL
NO.
PARAMETER
DESCRIPTION
MODE
MIN
MAX
UNIT
PRRG5
tsu(RD-RXC)
Setup time, RD[3:0] valid before RXC high/low
10 Mbps
TBD
ns
100 Mbps
TBD
ns
1000 Mbps
1
ns
tsu(RX_CTL-RXC)
Setup time, RX_CTL valid before RXC high/low
10 Mbps
TBD
ns
100 Mbps
TBD
ns
1000 Mbps
1
ns
PRRG6
th(RXC-RD)
Hold time, RD[3:0] valid after RXC high/low
10 Mbps
TBD
ns
100 Mbps
TBD
ns
1000 Mbps
1
ns
th(RXC-RX_CTL)
Hold time, RX_CTL valid after RXC high/low
10 Mbps
TBD
ns
100 Mbps
TBD
ns
1000 Mbps
1
ns
PRRG7
tt(RD)
Transition time, RD
10 Mbps
TBD
ns
100 Mbps
TBD
ns
1000 Mbps
0.75
ns
tt(RX_CTL)
Transition time, RX_CTL
10 Mbps
TBD
ns
100 Mbps
TBD
ns
1000 Mbps
0.75
ns



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